AHA3610

The AHA3610 GZIP compression coprocessor is a single chip CMOS VLSI device that implements the open-source GZIP (Deflate) lossless data compression and decompression algorithm. It supports a simultaneous compression/decompression data rate of 2.5 Gbits/sec, while achieving compression performance equivalent to GZIP S/W. The device implements 2 high speed 16-bit parallel DDR interfaces for easy integration in to many microprocessor based systems.

Features

• 2.5 Gbit/sec compression/decompression rates
• Full GZIP/Deflate algorithm compliance
• Compression performance equivalent to GZIP S/W
  
• Simultaneous compression and decompression
• Low Latency (4K segments < 24 usec)
• 529 pin fine-pitch BGA package
• RoHS compliant

GZIP

Application Notes

• AHA3610B Design Guide

• AHA3610 in Semiconductor Times

• HTML SAMPLE FILE

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• Comtech AHA Announces Low Cost GZIP Data Compression Board for Networking and Data Storage Environments
• Comtech AHA to Demonstrate Hardware Compression for Networking at Interop 2010

• AHA3610 Brief - 2.5 Gbps GZIP Compression/Decompression IC

• AHA3610B Specification - GZIP Lossless Compression/Decompression Coprocessor IC

• Hardware Based GZIP Compression, Benefits & applications
• Power Savings with Hardware based GZIP Compression
• Compressing Log Files with Hardware Based GZIP

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